Back to the Main Page

Last Updated: July 2026

A 2-page CV of myself (viz. Dr. Ngai WONG).

I received my PhD from this department in late 2003. My thesis, "Signal Processing: Linearized Noise Analysis of Delta-Operator Based Filters and Nonlinear Stability Study of Sigma-Delta Modulators," was supervised by Prof. T. S. Ng. During 2003, I visited Purdue University to work on EDA algorithms, hosted by Profs. Venkataramanan (Ragu) Balakrishnan and Cheng-Kok Koh. My heartfelt thanks to these mentors who shaped my research journey.

My research now centers on efficient AI software/hardware systems, spanning algorithms, circuits, and chip implementations. I coordinate the ReRACE Theme-based Research Scheme (HKD 32M, 2022-2026), Hong Kong's flagship project on ReRAM-based edge AI acceleration. This work integrates machine learning model optimization (large models, model compression, efficient training & inference), emerging memory computing (ReRAM crossbars, neuromorphic circuits), and real silicon implementation—including our department's first chip tape-out.

With my R&D passion and active industry partnerships (TCL technology licensing, HKD 15M+ AVNET-HKU EMUS Lab), my research bridges academic innovation and commercial impact. At the core of my work is the advancement of energy-efficient AI systems that deploy and deliver intelligence at the edge. A picture summary of my R&D goes below.

Overarching of N. Wong's Research

Journals

  1. H. Zhang, Z. Zhang, M. Wang, Z. Su, Y. Wang, Q. Wang, S. Yuan, E. Nie, X. Duan, Q. Xue, Z. Yu, C. Shang, X. Liang, J. Xiong, H. Shen, C. Tao, Z. Liu, S. Jin, Z. Xi, D. Zhang, S. Ananiadou, T. Gui, R. Xie, H. K.-H. So, H. Schütze, X. Huang, Q. Zhang, and N. Wong, “Locate, steer, and improve: A practical survey of actionable mechanistic interpretability in large language models,” Computer Science Review, vol. 62, p. 101011, 2026, to appear.
  2. Z. Guan, Z. Chen, D. Wu, A. Shen, Y. Guo, Y. Su, G. Chesi, M. Huang, N. Wong, and H. Yu, "APTQ+: Attention-FFN-aware post-training quantization for a layer-wise LLM accelerator on FPGA," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2026, to appear..
  3. X. Feng, W. Zhou, T. Wu, Z. Liu, M. Li, and N. Wong, "From SMURF to HI-SMURF: Scalable Multivariate Nonlinear Function Approximation via Compact Stochastic Architectures," IEEE Trans. Comput., to appear.
  4. Y. Du, X. Chen, Z. Liu, Z. Liu, N. Wong, C. Zhang, J. Chen, Z. Ding, J. Liu, and E. C. Ngai, "TinnitusLLM: A multimodal large language model framework for Tinnitus diagnosis through EEG-fMRI fusion learning," IEEE Journal of Biomedical and Health Informatics, to appear.
  5. T. Wu, C. Ding, W. Zhou, Y. Cheng, X. Feng, S. Wang, W. Xu, C. Shi, Z. Liu, and N. Wong, "Hardware-aware low-rank adaptation for large language models based on hybrid compute-in-memory architecture," ACM Transactions on Design Automation of Electronic Systems, vol. 31, no. 5, Sep. 2026.
  6. Y. Li, T. T. Ye, N. Wong, Z. Zhu, Y. Li, and W. Zhao, "ReNN-RV: Run-time PE reconfiguration for DNN inference acceleration with custom RISC-V ISA," IEEE Trans. Comput., vol. 75, no. 5, pp. 1820-1834, May 2026.
  7. Z. Su, W. Ye, H. Feng, K. Fan, J. Zhang, D. Yu, Z. Liu, and N. Wong, “XStreamVGGT: Extremely memory-efficient streaming vision geometry grounded transformer with KV cache compression,” Journal of the Society for Information Display, vol. 34, no. 5, pp. 535–545, March 2026.
  8. W. Zhou, Z. Liu, Y. Ren, N. Wong, "Binary Weight Multi-Bit Activation Quantization for Compute-in-Memory CNN Accelerators," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 45, no. 3, pp. 1432-1437, March 2026.
  9. Y. Li, T. T. Ye, W. Lin, W. Xu, N. Wong, and W. Zhao, "S-TRAC: Sparsity-aware threshold adjustment for DNN accelerators-based RISC-V ISA extensions via algorithm-hardware co-design," ACM Transactions on Parallel Computing, Feb. 2026.
  10. Z. Liu, Z. Wang, C. Ding, B. Lin, J. Tang, B. Gao, N. Wong, and H. Wu, "Privacy-preserving data analysis using a memristor chip with colocated authentication and processing," Sci. Adv., vol. 12, no. 6, p. eady5485, Feb. 2026.
  11. W. Xu, Y. Ji, Y. Bai, Y. Li, Y. Zhao, Z. Liu, B. Yu, N. Wong, "PPD: A Portable and Highly Parallel Dispatching System for Deep Learning", ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 31, no. 2, Mar. 2026.
  12. L. Xu, L. Cheng, N. Wong, Y.-C. Wu, "To Fold or Not to Fold: Graph Regularized Tensor Train for Visual Data Completion," IEEE Transactions on Pattern Analysis and Machine Intelligence, pp. 1437-1455, vol. 48, Feb. 2026.
  13. X. Qian, C. Liu, X. Qi, S. Tan, E. Y. Lam, N. Wong, "CAT++: Enhancing 3D Annotations with Hierarchical-Interleaved Encoding and Attention-Conditioned Implicit Representation," International Journal of Computer Vision, vol. 134, no. 71, Jan 2026.
  14. H. Hong, Z. Du, M. Jiang, R. Mao, Y. Ren, F. Li, W. Mao, M. Peng, W. Zhang, Z. Liu, C. Li, N. Wong, "Memristor-based adaptive analog-to-digital conversion for efficient and accurate compute-in-memory," Nat Commun 16, 9749, Nov. 2025.
  15. T. Hou, F. N. Najm, N. Wong, H.-B. Chen, "Novel Partitioning-Based Approach for Electromigration Assessment with Neural Networks," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 44, no. 12, pp. 4714-4727, Dec. 2025.
  16. W. Zhou, B. Li, J. Ren, T. Wu, Z. Ai, Z. Liu, N. Wong, "QuadINR: Hardware-Efficient Implicit Neural Representations Through Quadratic Activation," IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 72, no. 11, pp. 1600-1604, Nov. 2025.
  17. Y. Du, J. chen, Z. Liu, N. Wong, C. Zhang, Z. Ding, J. Liu, E. C. H. Ngai, "Valence-Arousal Disentangled Representation Learning for Emotion Recognition in SSVEP-based BCIs," IEEE Journal of Biomedical and Health Informatics, vol. 29, no. 7, pp. 4820-4833, Jul. 2025.
  18. C. Ding, Y. Ren, Z. Liu, N. Wong, "Transforming memristor noises into computational innovations," Communications Materials (6) 149, Jul 2025.
  19. B. Li, Z. Ai, B. Jiang, B. Huang, J. C. K. Li, J. Liu, Z. Tu, G. Wang, D. Yu, N. Wong, "BDLUT: Blind Image Denoising with Hardware-Optimized Look-Up Tables", Journal of the Society for Information Display (Special Issue: “Expanded Distinguished Papers of Display Week 2025”), vol. 33, no. 5, pp. 628-643, May 2025. (Cover-Featured)
  20. J. Xiong, G. Liu, L. Huang, C. Wu, T. Wu, Y. Mu, Y. Yao, H. Shen, Z. Wan, J. Huang, C. Tao, S. Yan, H. Yao, L. Kong, H. Yang, M. Zhang, G. Sapiro, J. Luo, P. Luo, N. Wong, "Autoregressive Models in Vision: A Survey," Transactions on Machine Learning Research (TMLR), Apr 2025.
  21. S. Li, C. Yang, T. Wu, C. Shi, Y. Zhang, X. Zhu, Z. Cheng, D. Cai, M. Yu, L. Liu, J. Zhou, Y. Yang, N. Wong, X. Wu, W. Lam, "A Survey on the Honesty of Large Language Models," Transactions on Machine Learning Research (TMLR), Mar 2025.
  22. Z. Liu, J. Mei, J. Tang, M. Xu, B. Gao, K. Wang, S. Ding, Q. Liu, Q. Qin, W. Chen, Y. Xi, Y. Li, P. Yao, H. Zhao, N. Wong, H. Qian, B. Hong, T.-P. Jung, D. Ming, H. Wu, "A memristor-based adaptive neuromorphic decoder for brain–computer interfaces," Nature Electronics, Feb. 2025.
  23. R. Lin, J. C. L. Li, J. Zhou, B. Huang, J. Ran and N. Wong, "Lite it fly: An All-Deformable-Butterfly Network," IEEE Transactions on Neural Networks and Learning Systems, vol. 36, no. 1, pp. 1919-1924, Jan. 2025.
  24. J. Jing, F. Sun, Z. Wang, L. Ma, Y. Luo, Z. Du, T. Zhang, Y. Wang, F. Xu, T. Zhang, C. Chen, X. Ma, Y. He, Y. Zhu, H. Sun, X. Wang, Y. Zhou, J. K. H. Tsoi, J. Wrachtrup, N. Wong, C. Li, D.-K. Ki, Q. Wang, K. H. Li, Y. L, Z. Chu, "Scalable production of ultraflat and ultraflexible diamond membrane," Nature, 636, 627–634, Dec. 2024
  25. T. Zhang, F. Sun, Y. Wang, Y. Li, J. Wang, Z. Wang, K. H. Li, Y. Zhu, Q. Wang, L. Shao, N. Wong, D. Lei, Y. Li, Z. Chu, "Scalable Reshaping of Diamond Particles via Programmable Nanosculpting," ACS Nano., Dec 2024.
  26. Y. Du, Y. Ren, N. Wong and E. C. H. Ngai, "Hyperdimensional Computing with Multi-Scale Local Binary Patterns for Scalp EEG-based Epileptic Seizure Detection," IEEE Internet of Things Journal, vol. 11, no. 15, pp. 26046-26061, Aug. 2024.
  27. J. Zhou, J. Wu, Y. Gao, Y. Ding, C. Tao, B. Li, F. Tu, K.-T. Cheng, H. K.-H. So and N. Wong, "DyBit: Dynamic Bit-Precision Numbers for Efficient Quantized Neural Network Inference," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 43, no. 5, pp. 1613-1617, May 2024.
  28. C. Tao, R. Lin, Q. Chen, Z. Zhang, P. Luo and N. Wong, "FAT: Frequency-Aware Transformation for Bridging Full-Precision and Low-Precision Deep Representations," arXiv:2102.07444 IEEE Transactions on Neural Networks and Learning Systems, vol. 35, no. 2, pp. 2640--2654, Feb. 2024.
  29. L. Xu, L. Cheng, N. Wong, Y.-C. Wu, H. V. Poor, "Overcoming Beam Squint in mmWave MIMO Channel Estimation: A Bayesian Multi-Band Sparsity Approach," IEEE Transactions on Signal Processing, vol. 72, pp. 1219--1234, Jan. 2024.
  30. Z. Du, M. Gupta, F. Xu, K. Zhang. J. Zhang, Y. Zhou, Y. Liu, Z. Wang, J. Wrachtrup, N. Wong, C. Li and Z. Chu, "Widefield Diamond Quantum Sensing with Neuromorphic Vision Sensors," Advanced Science, Nov 2023, https://doi.org/10.1002/advs.202304355.
  31. B. Li, K. Li, J. Zhou, R. Ren, W. Mao, H. Yu and N. Wong, "A Reconfigurable Processing Element for Multiple-Precision Floating/Fixed-Point HPC," IEEE Transactions on Circuits and Systems II: Express Briefs, doi: 10.1109/TCSII.2023.3322259.
  32. T. Hou, N. Wong, Q. Chen, Z. Ji and H.-B. Chen, "Analytical Post-voiding Modeling and Efficient Characterization of EM Failure Effects under Time-dependent Current Stressing," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 12, pp. 4959-4972, Dec. 2023.
  33. L. Xu, L. Cheng, N. Wong and Y. C. Wu, "Tensor Train Factorization under Noisy and Incomplete Data with Automatic Rank Estimation," Pattern Recognition, vol. 141, 2023.
  34. R. Mao, B. Wen, A. Kazemi, Y. Zhao, A.F. Laguana, R. Lin, N. Wong, M. Neimier, X.S. Hu, X. Sheng, C. Graves, J.P. Strachan, C. Li, "Experimentally validated memristive memory augmented neural network with efficient hashing and similarity search," Nature Communications, vol. 13, no. 6284, 2022.
  35. C. Liu, X. Qi, E. Y. Lam and N. Wong, "Fast Classification and Action Recognition With Event-Based Imaging," IEEE Access, vol. 10, pp. 55638-55649, 2022, doi: 10.1109/ACCESS.2022.3177744.
  36. T. Hou, P. Zhen, N. Wong, Q. Chen, G. Shi, S. Wang and H.-B. Chen, "Multilayer Perceptron Based Stress Evolution Analysis under DC Current Stressing for Multi-segment Wires," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 42, no. 2, pp. 544--557, Feb 2023.
  37. T. Hou, N. Wong, Q. Chen, Z. Ji and H.-B. Chen, "A Space-Time Neural Network for Analysis of Stress Evolution under DC Current Stressing," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 12, pp. 5501--5514, Dec 2022.
  38. J. Jing, Y. C. Yiu, C. Chen, D. Lei, L. Shao, Q. Wang, K. H. Li, N. Wong and Z. Chu, "A Data-Mining-Assisted Design of Structural Colors on Diamond Metasurfaces," Advanced Photonics Research, Jan 2022. (Inside Cover)
  39. C. Chen, K. Batselier, W. Yu and N. Wong, "Kernelized Support Tensor Train Machines," Pattern Recognition, vol. 122, Feb 2022.
  40. Y. Cheng, Y. Yang, H-B. Chen, N. Wong, H. Yu, "S3-Net: A Fast Scene Understanding Network by Single-shot Segmentation for Autonomous Driving," ACM Trans. Intelligent Systems and Technology, vol. 12, Oct, 2021, pp.1--19.
  41. K. Batselier, A. Cichocki and N. Wong, "MERACLE: Constructive layer-wise conversion of a Tensor Train into a MERA," arXiv: 1912.09775, Communications on Applied Mathematics and Computation, 2021, vol. 3, no. 2, Jun 2021, pp. 257--279.
  42. C-Y. Ko, C. Chen, Y. Zhang, K. Batselier and N. Wong, "Deep Model Compression and Inference Speedup of Sum-Product Networks on Tensor Trains," arXiv: 1811.03963, IEEE Transactions on Neural Networks and Learning Systems, vol. 31, no. 7, Jul. 2020, pp. 2665--2671.
  43. C-Y. Ko, K. Batselier, L. Daniel, W. Yu and N. Wong, "Fast and Accurate Tensor Completion with Total Variation Regularized Tensor Trains," arXiv:1804.06128, IEEE Trans. Image Processing, vol. 29, May 2020, pp. 6918--6931.
  44. Y. Cheng, G. Li, N. Wong, H-B. Chen and H. Yu, "DEEPEYE: A Deeply Tensor-Compressed Neural Network for Video Comprehension on Terminal Devices", ACM Transactions on Embedded Computing Systems (TECS), vol. 19, no. 3, May 2020.
  45. Z. Chen, K. Batselier, J. A. K. Suykens and N. Wong, "Parallelized tensor train learning of polynomial classifiers", arXiv: 1612.06505, IEEE Transactions on Neural Networks and Learning Systems, vol. 29, no. 10, Oct 2018, pp. 4621--4632.
  46. K. Batselier and N. Wong, "Matrix output extension of the tensor network Kalman filter with an application in MIMO Volterra system identification", arXiv: 1708.05156, Automatica, vol. 95, Sep 2018, pp. 413--418.
  47. K. Batselier, C. Y. Ko and N. Wong, "Tensor network subspace identification of polynomial state space models", arXiv: 1708.08773, Automatica, vol. 95, Sep 2018, pp. 187--196.
  48. K. Batselier, W. Yu, L. Daniel and N. Wong, "Computing low-rank approximations of large-scale matrices with the Tensor Network randomized SVD", arXiv: 1707.07803, SIAM Journal on Matrix Analysis and Applications, vol. 39, no. 3, Aug 2018, pp. 1221--1244.
  49. K. Batselier, Z. Chen and N. Wong, "Tensor Network alternating linear scheme for MIMO Volterra system identification", arXiv: 1607.00127, Automatica, vol. 84, pp. 26--35, Oct 2017.
  50. K. Batselier, Z. Chen and N. Wong, "A Tensor Network Kalman filter with an application in recursive MIMO Volterra system identification", arXiv: 1610.05434, Automatica, vol. 84, pp. 17--25, Oct 2017.
  51. K. Batselier and N. Wong, "A constructive arbitrary-degree Kronecker product decomposition of tensors," arXiv:1507.08805, Numerical Linear Algebra with Applications, vol. 24, no. 5, pp. e2097, Mar 2017.
  52. K. Batselier and N. Wong,"Inverse multivariate polynomial root-finding: numerical implementations of the affine and projective Buchberger-Moller algorithm," Journal of Computational and Applied Mathematics, vol. 320, pp. 15--29, Aug. 2017.
  53. Z. Zhang, K. Batselier, H. Liu, L. Daniel and N. Wong, "Tensor computation: a new framework for high-dimensional problems in EDA," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 36, no. 4, pp. 521--536, Apr 2017. (Keynote Paper)
  54. K. Batselier and N. Wong, "A QR algorithm for symmetric tensors, " arXiv:1411.1926.
  55. K. Batselier and N. Wong, "Symmetric tensor decomposition by an iterative eigendecomposition algorithm," arXiv:1409.4926, Journal of Computational and Applied Mathematics, vol. 308, no. C, pp. 69--82, Dec. 2016.
  56. Y. Zhang and N. Wong, "Compact model order reduction of weakly nonlinear systems by associated transform," Intl. J. Circuit Theory and Applications, vol. 44, no. 7, pp. 1367-1384, Jul 2016.
  57. Q. Chen, W. Schoenmaker, S.-H. Weng, C.-K. Cheng, G.-H. Chen, L.-J. Jiang and N. Wong, "A fast time-domain EM-TCAD coupled simulation framework via matrix exponential with stiffness reduction," Intl. J. Circuit Theory and Applications, vol. 44, no. 4, pp. 833-850, Apr 2016.
  58. K. Batselier and N. Wong, "Computing the state difference equations for discrete overdetermined linear mD systems," Automatica, vol. 64, pp. 254--261, Feb 2016.
  59. K. Batselier, H. Liu and N. Wong, "A constructive algorithm for decomposing a tensor into a finite sum of orthonormal rank-1 terms," arXiv:1407.1593, SIAM Journal on Matrix Analysis and Applications, vol. 36, no. 3, pp. 1315-1337, Sep 2015.
  60. H. Chen, Y. Li, S. X-.D. Tan, X. Huang, H. Wang and N. Wong, "H-matrix based finite-element-based thermal analysis for 3D ICs," ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 20, no. 4, pp. 47:1--25, Sep 2015.
  61. H. Liu, L. Daniel and N. Wong, "Model reduction and simulation of nonlinear circuits via tensor decomposition," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 7, pp. 1059-1069, Jul 2015.
  62. Q. Chen, J. Li, C. Y. Yam, Y. Zhang, N. Wong and G. Chen, "An approximate framework for quantum transport calculation with model order reduction," Journal of Computational Physics, vol. 286, pp. 49-61, Apr 2015.
  63. X. Wang, Z. Zhang, Q. Wang and N. Wong, "Gramian-based model order reduction of parameterized time-delay systems," Intl. J. Circuit Theory and Applications, vol. 42, no. 7, pp. 687-706, Jul 2014.
  64. Q. Wang, P. Xu and N. Wong, "Volterra series approximation for rational nonlinear systems," Journal of Applied Mathematics and Computing (JAMC), vol. 45, no. 1-2, pp. 411-432, Jun 2014.
  65. Z. Zhang and N. Wong, "Canonical projector techniques for analyzing descriptor systems," Intl. J. of Control, Automation, and Systems (IJCAS), vol. 12, no. 1, pp. 71-83, Feb 2014.
  66. L. Meng, Z. Yin, C. Yam, S. Koo, Q. Chen, N. Wong and G. Chen, "Frequency-domain multiscale quantum mechanics/electromagnetics simulation method," Journal of Chemical Physics, vol. 139, no. 24, pp. 244111, Dec 2013.
  67. S. Zhang, H. Liu, K. Batselier and N. Wong, "Limit cycle identification in nonlinear polynomial systems," Appl. Maths., vol. 4, no. 9A, pp. 19-26, Sep 2013.
  68. C. Y. Yam, J. Peng, Q. Chen, S. Markov, J. Z. Huang, N. Wong, W. C. Chew and G. Chen, "A multi-scale modeling of junctionless field-effect transistors," Appl. Phys. Lett., vol 103, no. 6, pp. 062109 (1-5), Aug 2013.
  69. H. Liu and N. Wong, "Autonomous Volterra algorithm for steady-state analysis of nonlinear circuits," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, no. 6, pp. 858-868, Jun 2013.
  70. Q. Wang, Y. Wang, E. Y. Lam, N. Wong, "Model order reduction for neutral systems by moment matching," Circuits, Systems, and Signal Processing (CSSP), vol. 32, no. 3, pp. 1039-1063, Jun 2013.
  71. Q. Chen, W. Schoenmaker, G. Chen, L. Jiang and N. Wong, "A numerically efficient formulation for time-domain electromagnetic-semiconductor co-simulation for fast-transient systems," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32, no. 5, pp. 802-806, May 2013.
  72. Q. Wang, P. Xu, E. Y. Lam and N. Wong, "Iterative solution to linear matrix inequality arising from time delay descriptor systems," Applied Mathematics and Computation, vol. 219, no. 9, pp. 4176-4184, Jan 2013.
  73. C. Y. Lin, N. Wong and H. K.-H. So, "Design space exploration for sparse matrix-matrix multiplication on FPGAs," Intl. J. Circuit Theory and Applications, vol. 41, no. 2, pp. 205-219, Feb 2013.
  74. Y. Wang, Z. Zhang, C.-K. Koh, G. Shi, G. K. H. Pang and N. Wong,"Passivity enforcement for descriptor systems via matrix pencil perturbation," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 31, no. 4, pp. 532-545, Apr 2012.
  75. L. Meng, C. Y. Yam, S. K. Koo, Q. Chen, N. Wong and G. Chen, "Dynamic multiscale quantum mechanics/electromagnetics simulation method," J. Chemical Theory and Computation, vol. 8, no. 4, pp. 1190-1199, Feb 2012.
  76. Y. Wang, H. Xiang, C.-K. Cheng, G. K. H. Pang and N. Wong, "A realistic early-stage power grid verification algorithm based on hierarchical constraints," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol. 31, no. 1, pp. 109-120, Jan 2012.
  77. C. U. Lei and N. Wong, "WISE: Warped impulse structure estimation for time-domain linear macromodeling," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 2, no. 1, pp. 131-139, Jan 2012.
  78. Q. Wang, T. Zhong, N. Wong and Q. Wang, "Hilbert-Schmidt-Hankel norm model reduction for matrix second order linear systems," J. Control Theory Appl., vol. 9, no. 4, pp. 571-578, Nov 2011.
  79. Y. Shen, N. Wong, E. Y. M. Lam and C.-K. Koh, "Finite difference schemes for heat conduction analysis in integrated circuit design and manufacturing," Intl. J. Circuit Theory and Applications, vol. 39, no. 9, pp. 905-921, Sep 2011.
  80. David C. W. Ng, David K. K. Kwong and N. Wong, "A sub-1V, 26uW, low-output-impedance CMOS bandgap reference with a low dropout or source follower mode," IEEE Transactions on Very Large Scale Integration Systems, vol. 19, no. 7, pp. 1305-1309, Jul 2011.
  81. Q. Chen, W. Schoenmaker, P. Meuris and N. Wong, "An effective formulation of coupled electromagnetic-TCAD simulation for extremely high frequency onwards," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol. 30, no. 6, pp. 866-876, Jun 2011.
  82. C. Y. Yam, L. Meng, G. Chen, Q. Chen and N. Wong, "Multiscale quantum mechanics/electromagnetics simulation for electronic devices," Physical Chemistry Chemical Physics (PCCP), vol. 13, no. 32, pp. 14365-14369, Jun 2011.
  83. Y. Shen, N. Jia, N. Wong and E. Y. Lam, "Robust level-set-based inversed lithography," Optics Express, vol. 19, no. 6, pp. 5511-5521, Mar 2011.
  84. C. W. Ng, N. Wong, H. K.-H. So and T.-S. Ng, "On IIR-based bit-stream multipliers," Intl. J. Circuit Theory and Applications, vol. 39, no. 2, pp. 149-158, Feb 2011.
  85. Z. Zhang and N. Wong, "Passivity check of S-parameter descriptor systems via S-parameter generalized Hamiltonian methods," IEEE Transactions on Advanced Packaging, vol. 33, no. 4, pp. 1034-1042, Nov 2010.
  86. C. U. Lei, Y. Wang, Q. Chen and N. Wong, "A decade of vector fitting development: applications on signal/power integrity," IAENG Trans. on Engineering Technologies, vol. 1285, pp. 435-449, The American Institute of Physics, Oct 2010.
  87. Z. Zhang and N. Wong, "An efficient projector-based passivity test for descriptor systems," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol. 29, no. 8, pp. 1203-1214, Aug 2010.
  88. N. Wong and Z. Zhang, "Discussion of ``A half-size singularity test matrix for fast and reliable passivity assessment of rational models''," IEEE Transactions on Power Delivery, vol. 25, no. 2, pp. 1212-1213, Apr. 2010.
  89. Z. Zhang and N. Wong, "Passivity test of immittance descriptor systems based on generalized Hamiltonian methods," IEEE Transactions on Circuits and Systems II, vol. 57, no. 1, pp. 61-65, Jan 2010.
  90. Y. J. Shen, N. Wong and E. Y. M. Lam, "Level-set-based inverse lithography for photomask synthesis," Optics Express, vol. 17, no. 26, pp. 23690-23701, Dec 2009.
  91. Q. Chen, H. W. Choi and N. Wong, "Robust simulation methodology for surface roughness loss in interconnect and package modelings", IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol. 28, no. 11, pp. 1654-1665, Nov 2009.
  92. David C. W. Ng, David K. K. Kwong and N. Wong, "A 30uW CMOS bandgap reference featuring a 1.5mA-6mA output driving current and a Miller-effect startup circuit," Microelectronics Journal, vol. 40, no. 11, pp. 1514-1522, Nov 2009.
  93. Q. Chen and N. Wong, "Efficient numerical modeling of random rough surface effects in interconnect resistance extraction," Intl. J. Circuit Theory and Applications, vol. 37, no. 6, pp. 751-763, Aug 2009.
  94. L. Zhu, C. W. Ng, N. Wong, K. K. Y. Wong, P. T. Lai and H. W. Choi, "Pixel-to-pixel fiber-coupled emissive micro-light-emitting diode arrays," IEEE Photonics Journal, vol. 1, no. 1, pp. 1-8, Jun 2009.
  95. C.-U. Lei and N. Wong, "IIR approximation of FIR filters via discrete-time hybrid-domain vector fitting," IEEE Signal Processing Letters, vol. 16, no. 6, pp. 533-536, Jun 2009.
  96. Y. H. Ho, H. K. Kwan, N. Wong and K. L. Ho, "Designing globally optimal delta-sigma modulator topologies via signomial programming," Intl. J. Circuit Theory and Applications, vol. 37, no. 3, pp. 453-472, Apr 2009.
  97. Y. H. Alvin Ho, C. U. Lei, H. K. Kwan and N. Wong, "Optimal common sub-expression elimination algorithm of multiple constant multiplications with a logic depth constraint", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E91-A, no. 12, pp. 3565-3575, Dec 2008.
  98. S. H. Lui, H. K. Kwan and N. Wong, "Analog circuit design by nonconvex polynomial optimization: two design examples," Intl. J. Circuit Theory and Applications, vol. 38, no. 1, pp. 25-43, Aug 2008.
  99. C. W. Ng, N. Wong and T. S. Ng, "Quad-level bit-stream adders and multipliers with efficient FPGA implementation," Electronics Letters, vol. 44, no. 12, pp. 722-724, Jun 2008.
  100. N. Wong, "Efficient positive-real balanced truncation of symmetric systems via cross Riccati equations," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol. 27, no. 3, pp. 470-480, Mar 2008.
  101. N. Wong and C. K. Chu, "A fast passivity test for stable descriptor systems via skew-Hamiltonian/Hamiltonian matrix pencil transformations," IEEE Transactions on Circuits and Systems I, vol. 55, no. 2, pp. 635-643, Mar 2008.
  102. N. Wong and C. U. Lei, "IIR approximation of FIR filters via discrete-time vector fitting," IEEE Trans. Signal Processing, vol. 56, no. 3, pp. 1296-1302, Mar 2008.
  103. Y. Shen, E. Y. Lam and N. Wong, "A signomial programming approach for binary image restoration by penalized least squares," IEEE Transactions on Circuits and Systems II, vol. 55, no. 1, pp. 41-45, Jan 2008.
  104. C. W. Ng, N. Wong and T. S. Ng, "Bit-stream adders and multipliers for tri-level sigma-delta modulators," IEEE Trans. Circuits Syst. II, vol. 54, no. 12, pp. 1082-1086, Dec 2007.
  105. C. U. Lei, C. M. Cheung and N. Wong, "Efficient 2D linear-phase IIR filter design and application in image filtering," IAENG International Journal of Applied Mathematics, vol. 37, no. 1, pp. 56-63, Sep 2007.
  106. Y. H. A. Ho, C. U. Lei and N. Wong, "A common subexpression sharing approach for multiplierless synthesis of multiple constant multiplications," IAENG Engineering Letters, vol. 15, no. 1, pp. 149-156, Sep 2007.
  107. N. Wong and V. Balakrishnan, "Fast positive-real balanced truncation via quadratic alternating direction implicit iteration," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 9, pp. 1725-1731, Sep 2007.
  108. C. W. Ng, N. Wong and T. S. Ng, "Efficient FPGA implementation of bit-stream multipliers," Electronics Letters, vol. 43, no. 9, pp. 496-497, Apr 2007.
  109. N. Wong and K. K. Y. Wong, "Gain bandwidth optimization in two-pump fiber optical parametric amplifiers under bounded zero-dispersion wavelength fluctuations," Optics Communications, vol. 272, no. 2, pp. 514-520, Apr 2007.
  110. Y. Shen, E. Y. Lam, and N. Wong, "Robust binary image deconvolution with positive semidefinite programming," IAENG International Journal of Applied Mathematics, vol. 36, no. 1, pp. 41-48, Mar 2007.
  111. Y. Shen, E. Y. M. Lam, and N. Wong, "Binary image restoration by positive semidefinite programming," Optics Letters, vol. 32, pp. 121-123, Jan 2007.
  112. N. Wong, V. Balakrishnan, C.-K. Koh, and T. S. Ng, "Two algorithms for fast and accurate passivity-preserving model order reduction," IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, vol. 25, no. 10, pp. 2062-2075, Oct 2006.
  113. N. Wong and T. S. Ng, "Fast detection of instability in sigma-delta modulators based on unstable embedded limit cycles," IEEE Trans. Circuits Syst. II, vol. 51, pp. 442-449, Aug 2004.
  114. N. Wong and T. S. Ng, "DC stability analysis of high-order, lowpass sigma-delta modulators with distinct unit-circle NTF zeros," IEEE Trans. Circuits Syst. II, vol. 50, pp. 12-30, Jan 2003.
  115. N. Wong and T. S. Ng, "A generalized direct-form delta operator-based IIR filter with minimum noise gain and sensitivity," IEEE Trans. Circuits Syst. II, vol. 48, pp. 425-431, Apr 2001.
  116. N. Wong and T. S. Ng, "Roundoff noise minimization in a modified direct-form delta operator IIR structure," IEEE Trans. Circuits Syst. II, vol. 47, pp. 1533-1536, Dec 2000.
Book Chapters
  1. C. Chen, K. Batselier and N. Wong, "Tensor Network Algorithms for Image Classification," Tensors for Data Processing, pp. 249-292, Elsevier, 2022.
  2. D. C. W. Ng, V. So, H. K. Kwan, D. Kwong and N. Wong, "A 7V-to-30V-Supply 190A/us Regulated Gate Driver in a 5V CMOS-Compatible Process," Advances in Solid State Circuit Technologies, IN-TECH Online, April 2010.
  3. C. U. Lei, C.M. Cheung, and N. Wong, "Efficient Design of Arbitrary Complex Response Continuous-Time IIR Filter," Trends in Communication Technologies and Engineering Science, Springer, Heidelberg, Vol. 33, pp. 163-176, 2009.
  4. Y. H. A. Ho, C. U. Lei and N. Wong, "Multiplierless synthesis of multiple constant multiplications using common subexpression sharing with genetic algorithm," Advances in Communication Systems and Electrical Engineering in series of Lecture Notes Electrical Engineering, pp. 339-353, Springer, Heidelberg, 2008.
  5. C. U. Lei, C. M. Cheung and N. Wong, "Efficient 2D linear-phase IIR filter design and application in image processing," Advances in Communication Systems and Electrical Engineering in series of Lecture Notes Electrical Engineering, pp. 411-424, Springer, Heidelberg, 2008.
  6. Y. Shen, E. Y. Lam, and N. Wong, "Robust binary image deconvolution with positive semidefinite programming," in Recent Advances in Engineering and Computer Science. Newswood, 2007, pp. 159-166.
  7. N. Wong, V. Balakrishnan, and T. S. Ng, "A second-order cone bounding algorithm for robust minimum variance beamforming," Lecture Notes in Computer Science, Springer-Verlag GmbH, Volume 3355, Pages 223 - 247, Jan 2005.
Conferences
  1. J. Ren, W. Zhou, T. Wu, Y. Cheng, X. Feng, Z. Liu, and N. Wong, “PatchINR: Patch-based implicit neural representations for efficient and scalable inference,” in Proc. 18th Int. Conf. Signal Processing Systems (ICSPS), Oct. 23–26, 2026.
  2. T. Wu, Y. Cheng, C. Ding, R. Yang, X. Feng, W. Zhou, Z. Liu, and N. Wong, “Can we trust LLMs on memristors? Diving into reasoning ability under non-ideality,” in Proc. Conf. on Language Modeling (COLM), San Francisco, CA, USA, Oct. 6–9, 2026.
  3. X. Cheng, Z. Zhang, N. Wong, T. Zhao, Z. Wang, and R. Hu, "UNOP: Physics-Constrained Unsupervised Neural Operator for Long-Horizon PDE Learning on Generalized Geometries," in Proc. 35th Int. Joint Conf. Artif. Intell. (IJCAI-ECAI), Aug. 15–21, 2026.
  4. Z. Li, B. Geng, J. Xiong, Y. He, Y. Hu, J. Chen, D. Chen, X. Chang, N. Wong, L. Zhang, L. Mo, C. Li, C. Yuan, and Z. Sun, "CTR-Sink: Attention sink for language models in click-through rate prediction," in Proc. 32nd ACM SIGKDD Conf. Knowledge Discovery and Data Mining (KDD), Aug. 9–13, 2026.
  5. X. Feng, W. Zhou, T. Wu, Z. Liu, M. Li, and N. Wong, "EdgeSC: Universal Stochastic Computing Architecture for Efficient Edge Detection," in Proc. Design Autom. Conf. (DAC), Jul. 26–29, 2026.
  6. Y. Li, T. T. Ye, H. Xiao, Z. W. Liu, N. Wong, and W. Zhao, "PEACE: Algorithm–Hardware Co-Design for PE-Granular Energy-Aware Compressed GEMM Acceleration," in Proc. Design Autom. Conf. (DAC), Jul. 26–29, 2026.
  7. J. Chen, J. Li, J. Xiong, W. Wang, Q. Yang, H. Xiao, Z. Li, T. Wu, M. Chen, Z. Peng, C. Tao, L. Shi, H. Yang, and N. Wong, "BPDQ: Bit-Plane Decomposition Quantization on a Variable Grid for Large Language Models," in Proc. 43rd Int. Conf. Mach. Learn. (ICML), Jul. 6–11, 2026.
  8. X. Feng, T. Xie, N. Wong, and M. Li, "STSCA: Scalable Tensor-Train Stochastic Computing With Stabilized Arithmetic for High-Dimensional Nonlinear Operators," in Proc. 26th IEEE Int. Conf. Nanotechnol. (IEEE-NANO), Jul. 5–8, 2026.
  9. T. Wu, R. Yang, T. Liu, J. Wang, and N. Wong, "Revisiting Model Interpolation for Efficient Reasoning," in Proc. 64th Annu. Meeting Assoc. Comput. Linguistics (ACL), Jul. 2–7, 2026.
  10. H. Zhang, S. Yang, X. Liang, C. Shang, Y. Jiang, C. Tao, J. Xiong, H. K.-H. So, R. Xie, A. X. Chang, and N. Wong, "Find Your Optimal Teacher: Personalized Data Synthesis via Router-Guided Multi-Teacher Distillation," in Proc. 64th Annu. Meeting Assoc. Comput. Linguistics (ACL), Jul. 2–7, 2026.
  11. H. Zhang, Z. Zhang, E. Nie, M. Wang, Z. Su, Y. Wang, Q. Wang, S. Yuan, X. Duan, Q. Xue, Z. Yu, C. Shang, X. Liang, J. Xiong, H. Shen, C. Tao, Z. Liu, S. Jin, Z. Xi, D. Zhang, S. Ananiadou, T. Gui, R. Xie, H. K.-H. So, H. Schuetze, X. Huang, Q. Zhang, and N. Wong, "Locate, Steer, and Improve: A Practical Survey of Actionable Mechanistic Interpretability in Large Language Models," in Proc. 64th Annu. Meeting Assoc. Comput. Linguistics (ACL), Jul. 2–7, 2026.
  12. H. Xiao, Q. Yang, D. Xie, W. Xu, Z. Su, R. Yang, H. Liu, W. Zhou, Z. Liu, and N. Wong, "Exploring Layer-wise Information Effectiveness for Post-Training Quantization in Small Language Models," in Proc. 64th Annu. Meeting Assoc. Comput. Linguistics (ACL), Jul. 2–7, 2026.
  13. J. Li, S. Song, G. Du, N. Wong, X. Liu, Y. Li, M. Zhang, J. Li, and X. Li, "D-QRELO: Training- and Data-Free Delta Compression for Large Language Models via Quantization and Residual Low-Rank Approximation," in Proc. 64th Annu. Meeting Assoc. Comput. Linguistics (ACL), Jul. 2–7, 2026.
  14. X. Chen, X. Chu, Y. Qiu, H. Zhang, J. Xiong, S. Tang, S. Liu, S. Yang, C. Yang, H. K.-H. So, and N. Wong, "Residual decoding: Mitigating hallucinations in large vision-language models via history-aware residual guidance," in Proc. IEEE/CVF Conf. Comput. Vis. Pattern Recognit. (CVPR), Jun. 3-7, 2026.
  15. C. Zhang, W. Zuo, B. Cheng, Y. Wang, W.-B. Kou, Y. C. Wu, and N. Wong, "NTK-guided implicit neural teaching," in Proc. IEEE/CVF Conf. Comput. Vis. Pattern Recognit. (CVPR), Jun. 3-7, 2026.
  16. Z. Su, W. Ye, H. Feng, K. Fan, J. Zhang, D. Yu, Z. Liu, and N. Wong, “XStreamVGGT: Extremely memory-efficient streaming vision geometry grounded transformer with KV cache compression,” in Proc. Society for Information Display International Symposium, Seminar & Exhibition (SID), May 2026. (Distinguished Student Poster Award)
  17. W. Xu, J. Xiong, C. Zhao, Q. Chen, H. Wang, H. Shen, Z. Wan, J. Dai, T. Wu, H. Xiao, C. Tao, Z. Mao, Y. Sheng, Z. Guo, H. Yang, B. Yu, L. Kong, Q. Gu, and N. Wong, "SWINGARENA: Adversarial programming arena for long-context GitHub issue solving," in Proc. Int. Conf. Learn. Representations (ICLR), Apr. 23–27, 2026 (Oral).
  18. C. Zhang, J. Wang, B. Cheng, Z. Chen, W. Xu, C. Wang, M. Canini, F. Orabona, Y. C. Wu, and N. Wong, "Nonparametric teaching of attention learners," in Proc. Int. Conf. Learn. Representations (ICLR), Apr. 23–27, 2026.
  19. J. Xiong, Q. Chen, F. Ye, Z. Wan, C. Zheng, C. Zhao, H. Shen, A. H. Li, C. Tao, H. Tan, H. Bai, L. Shang, L. Kong, and N. Wong, "ATTS: Asynchronous test-time scaling via conformal prediction," in Proc. Int. Conf. Learn. Representations (ICLR), Apr. 23–27, 2026.
  20. Z. Su, Q. Li, H. Zhang, W. Ye, Q. Xue, Y. Qian, N. Wong, and K. Yuan, "Unveiling super experts in mixture-of-experts large language models," in Proc. Int. Conf. Learn. Representations (ICLR), Apr. 23–27, 2026.
  21. Q. Xie, W. Chen, Q. Chen, D. Liu, Z. Guan, K. Li, H. Peng, J. Gu, C. Chen, N. Wong, M. Huang, and H. Yu, "A 24.46 TOPS/W and 3.04 TOPS/mm² BF16×1-bit CIM-based BERT accelerator in 28 nm CMOS," in Proc. 2026 IEEE Custom Integrated Circuits Conf. (CICC), Apr. 19–22, 2026.
  22. W. Xu, C. Chen, H. Xiao, K. Li, J. Xiong, C. Zhang, W. Zhou, C. Tao, Y. Bai, B. Yu, N. Wong, "AnchorTP: Resilient LLM Inference with State-Preserving Elastic Tensor Parallelism", IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.
  23. J. Xiong, J. Shen, F. Ye, C. Tao, Z. Wan, J. Lu, X. Wu, C. Zheng, Z. Guo, M. Yang, L. Kong, N. Wong, "UNComp: Can Information Compression Uncover Sparsity? — A Compressor Design from an Uncertainty-Aware Perspective," in Proc. Conference on Empirical Methods in Natural Language Processing (EMNLP), Nov. 2025.
  24. J. Zhou, Y. Yang, K. Zhen, Z. Liu, Y. Zhao, E. Banijamali, A. Mouchtaris, N. Wong, Z. Zhang, "QuZO: Quantized Zeroth-Order Fine-Tuning for Large Language Models," in Proc. Conference on Empirical Methods in Natural Language Processing (EMNLP), Nov. 2025.
  25. Z. Guan, J. C. L. Li, Z. Hou, P. Zhang, D. Xu, Y. zhao, M. Wu, J. chen, T.-T. Nguyen, P. Xian, W. Ma, S. Qin, G. Chesi, N. Wong, "KG-RAG: Enhancing GUI Agent Decision-Making via Knowledge Graph-Driven Retrieval-Augmented Generation," in Proc. Conference on Empirical Methods in Natural Language Processing (EMNLP), Nov. 2025.
  26. X. Chen, H. Zhang, Y. Qiu, Xi. Liang, Z. Li, G. Wang, W. Li, T. Mo, W. Lv, N. Wong, "GuiLoMo: Allocating Experts and Ranks for LoRA-MoE via Bilevel Optimization with GuidedSelection Vectors," in Proc. Conference on Empirical Methods in Natural Language Processing (EMNLP), Nov. 2025.
  27. Y. Chang, Z. Li, H. Zhang, Y. Kong, Y. Wu, Z. Guo, N. Wong, " TreeReview: A Dynamic Tree of Questions Framework for Deep and Efficient LLM-based Scientific Peer Review," in Proc. Conference on Empirical Methods in Natural Language Processing (EMNLP), Nov. 2025.
  28. Y. Feng, W. Zhou, Y. Lyu, Y. Zhang, Z. Liu, N. Wong, W. Kang, "Extending Straight-Through Estimation for Robust Neural Networks on Analog CIM Hardware," in Prof. Intl. Conf. ASIC (ASICON), Oct. 2025.
  29. Y. Feng, W. Zhou, Y. Lyu, H. Liu, Z. Liu, N. Wong, W. Kang, "HPD: Hybrid Projection Decomposition for Robust State Space Models on Analog CIM Hardware," in Prof. Intl. Conf. ASIC (ASICON), Oct. 2025.
  30. Y. Su, Z. Guan, X. Liu, T. Jin, D. Wu, Z. Chen, G. Chesi, N. Wong, H. Yu, "LLM-Barber: Block-Aware Rebuilder for Sparsity Mask in One-Shot for Large Language Models," in Prof. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Oct. 2025.
  31. Y. Cheng, B. Huang, W. Zhou, T. Wu, Z. Liu, G. Chesi, N. Wong, "Re-Activating Frozen Primitives for 3D Gaussian Splatting," in Prof. ACM International Conference on Multimedia (ACM MM), Oct. 2025.
  32. Y. Cheng, B. Huang, T. Wu, W. Zhou, C. Ding, Z. Liu, G. Chesi, N. Wong, "Perspective-aware 3D Gaussian Inpainting with Multi-view Consistency," in Prof. International Conference on Computer Vision (ICCV), Oct, 2025.
  33. B. Huang, Z. Li, S. Liu, X. Tang, J. Tang, J. Lin, Y. Cheng, Z. Chen, X. Wu, N. Wong, "Hybrid Mesh-Gaussian Representation for Efficient Indoor Scene Reconstruction," in Proc. International Joint Conference on Artificial Intelligence (IJCAI), Aug. 2025.
  34. B. Huang, N. Wong, "Poisoning-based Backdoor Attacks for Arbitrary Target Label with Positive Triggers," in Proc. International Joint Conference on Artificial Intelligence (IJCAI), Aug. 2025.
  35. C. Zhang, W. Bu, Z. Ren, Z. Liu, Y. C. Wu, N. Wong, "Nonparametric Teaching for Graph Property Learners," in Proc. Intl. Conf. on Machine Learning (ICML), Jul. 2025. (Spotlight)
  36. J. Xiong, J. Shen, C. Zheng, Z. Wan, C. Zhao, C. Yang, F. Ye, H. Yang, L. Kong, N. Wong, "ParallelComp: Parallel Long-Context Compressor for Length Extrapolation," in Proc. Intl. Conf. on Machine Learning (ICML), Jul. 2025.
  37. W. Zhou, J. Ren, Z. Liu, T. Wu, Y. Cheng, N. Wong, "Distribution-Aware Hadamard Quantization for Hardware-Efficient Implicit Neural Representations," in Proc. IEEE International Conference on Multimedia & Expo (ICME), Jun. 2025.
  38. S. Yang, B. Huang, Y. Zhang, D. Yu, Y. Yang, N. Wong, "DnLUT: Ultra-Efficient Color Image Denoising via Channel-Aware Lookup Tables," in Proc. IEEE / CVF Computer Vision and Pattern Recognition Conference (CVPR), Jun. 2025.
  39. B. Li, Z. Ai, B. Jiang, B. Huang, J. C. K. Li, J. Liu, Z. Tu, G. Wang, D. Yu, N. Wong, "BDLUT: Blind Image Denoising with Hardware-Optimized Look-Up Tables," in Proc. Society for Information Display International Symposium, Seminar & Exhibition (SID), May 2025. (Distinguished Paper)
  40. W. Zhou, Y. Cheng, T. Wu, C. Zhang, Z. Liu, N. Wong, "Enhancing Robustness of Implicit Neural Representations Against Weight Perturbations," in Proc. IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Apr 2025.
  41. W. Zhou, T. Wu, Y. Cheng, C. Zhang, Z. Liu, N. Wong, "MINR: Efficient Implicit Neural Representations for Multi-Image Encoding," in Proc. IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Apr 2025.
  42. W. Zhou, Y. Ren, J. Zhou, C. Ding, Z. Liu, N. Wong, "RRAM-Based Isotropic CNNs with High Robustness and Resource Utilization Rate," in Proc. IEEE Electron Devices Technology and Manufacturing Conference (EDTM), Mar. 2025.
  43. W. Zhou, T. Wu, C. Ding, Y. Ren, Z. Liu, N. Wong, "Towards Robust RRAM-based Vision Transformer Models with Noise-aware Knowledge Distillation," in Proc. Design, Automation and Test in Europe Conference (DATE), Mar. 2025.
  44. T. Wu, C. Tao, J. Wang, R. Yang, Z. Zhao, N. Wong, "Rethinking Kullback-Leibler Divergence in Knowledge Distillation for Large Language Models," in Proc. International Conference on Computational Linguistics (COLING), Jan 2025.
  45. T. Wu, Z. Zhao, J. Wang, X. Bai, L. Wang, N. Wong, Y. Yang, "Edge-free but Structure-aware: Prototype-Guided Knowledge Distillation from GNNs to MLPs," in Proc. International Conference on Computational Linguistics (COLING), Jan 2025.
  46. X. Feng, G. Shen, J. Hu, M. Li, N. Wong, "Stochastic Multivariate Universal-Radix Finite-State Machine: a Theoretically and Practically Elegant Nonlinear Function Approximator," in Prof. Asia and South Pacific Design Automation Conference (ASPDAC), Jan 2025.
  47. Y. Fu, Y. Liu, N. Wong, J. Xu, "SPICE-Compatible Modeling and Design for Electronic-Photonic Integrated Circuits," in Prof. Asia and South Pacific Design Automation Conference (ASPDAC), Jan 2025.
  48. C. Tao, Q. Liu, L. Dou, N. Muennighoff, Z. Wan, P. Luo, M. Lin, N. Wong, "Scaling Laws with Vocabulary: Larger Models Deserve Larger Vocabularies," in Proc. Conf. on Neural Information Processing Systems (NeurIPS), Dec 2024.
  49. T. Wu, J. Wang, Z. Zhao, N. Wong, "Mixture-of-Subspaces in Low-Rank Adaptation", in Proc. Conference on Empirical Methods in Natural Language Processing (EMNLP), Nov 2024.
  50. Z. Yang, R. Chen, T. Wu, M. Li, N. Wong, Y. (Eric) Liang, R. Wang and R. Huang, "MCUBERT: Memory-Efficient BERT Inference on Commodity Microcontrollers" IEEE/ACM International Conference on Computer-Aided Design, Oct 2024.
  51. S. Yang, B. Huang, M. Cao, Y. Ji, H. Guo, N. Wong, Y. Yang,"Taming Lookup Tables for Efficient Image Retouching," European Conference on Computer Vision (ECCV), Sep 2024.
  52. B. Huang, J. C. L. Li, R. Jie, B. Li, J. Zhou, D. Yu, N. Wong,"HKLUT: Hundred-Kilobyte Lookup Tables," International Joint Conference on Artificial Intelligence (IJCAI), Aug 2024.
  53. C. Zhang, S. T. S. Luo, J. C. L. Li, Y. C. Wu, N. Wong, "Nonparametric Teaching of Implicit Neural Representations," International Conference on Machine Learning (ICML), Jul 2024.
  54. Z. Guan, H. Huang, Y. Su, H. Huang, N. Wong, H. Yu, "APTQ: Attention-aware Post-Training Mixed-Precision Quantization for Large Language Models," Design Automation Conference (DAC), Jun 2024.
  55. Y. Yang, J. Zhou, N. Wong, Z. Zheng, "LoRETTA: Low-Rank Economic Tensor-Train Adaptation for Ultra-Low-Parameter Fine-Tuning of Large Language Models," North American Chapter of the Association for Computational Linguistics (NAACL), Jun 2024.
  56. T. Wu, C. Hou, S. Lao, J. Li, N. Wong, Z. Zhao, Y. Yang, "Weight-Inherited Distillation for Task-Agnostic BERT Compression," North American Chapter of the Association for Computational Linguistics (NAACL), Jun 2024.
  57. J. C. L. Li, S. T. S. Luo, L. Xu and N. Wong, "ASMR: Activation-Sharing Multi-Resolution Coordinate Networks for Efficient Inference," Intl. Conf. Learning Representations (ICLR), May 2024.
  58. W. Qi, W. Zhou, N. Wong and S. C. Chan, "Hybrid Module with Multiple Receptive Fields and Self-Attention Layers for Medical Image Segmentation," IEEE Intl. Conf. Acoustics, Speech and Signal Processing (ICASSP), Apr 2024.
  59. Z. Guan, B. Li, Y. Ren, M. Niu, H. Huang, G. Chesi, H. Yu and N. Wong, "An Isotropic Shift-Pointwise Network for Crossbar-Efficient Neural Network Design," Design, Automation & Test in Europe (DATE), Valencia, Spain, Mar 2024.
  60. J. C. L. Li, C. Liu, B. Huang and N. Wong, "Learning Spatially Collaged Fourier Bases for Implicit Neural Representation," AAAI Conference on Artificial Intelligence (AAAI), Feb. 2024.
  61. T. Hou, Y. Ren, W. Zhou, C. Li, Z. Wong, H.-B. Chen and N. Wong, "Physics-Informed Learning for Versatile RRAM Reset and Retention Simulation," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), Jan 2024.
  62. C. Liu, X. Li, L. Shang, X. Jiang, Q. Liu, E. Y. M. Lam and N. Wong, "Gradually Excavating External Knowledge for Implicit Complex Question Answering," in Proc. Conference on Empirical Methods in Natural Language Processing (EMNLP), Dec 2023.
  63. J. C. L. Li, R. Lin, J. Zhou, E. Y. M. Lam and N. Wong, "A Unifying Tensor View for Lightweight CNNs," ASICON, Oct 2023, (Invited Talk).
  64. W. Zhou, Y. Ren, J. Zhou, T. Hou, N. Wong, "A Time- And Energy-Efficient CNN with Dense Connections on Memristor-Based Chips," ASICON, Oct 2023.
  65. C. Tao, L. Hou, H. Bai, J. Wei, X. Jiang, Q. Liu, P. Luo and N. Wong, "Structured Pruning for Efficient Generative Pre-trained Language Models," in Proc. Association for Computational Linguistics (ACL), July 2023.
  66. J. Wu, J. Zhou, Y. Gao, Y. Ding, N. Wong and H. So, "MSD: Mixing Signed Digit Representations for Hardware-efficient DNN Acceleration on FPGA with Heterogeneous Resources," Intl. Symp. Field-Programmable Custom Computing Machines (FCCM 2023).
  67. J. Ran, R. Lin, J. C. L. Li, J. Zhou and N. Wong, "PECAN: A Product-Quantized Content Addressable Memory Network," 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 2023, pp. 1--6, doi: 10.23919/DATE56975.2023.10137218.
  68. X. Qian, C. Liu, X. Qi, S.-C. Tan, E. Lam and N. Wong, "Context-Aware Transformer for 3D Point Cloud Automatic Annotation," AAAI Conference on Artificial Intelligence (AAAI), Feb. 2023.
  69. B. Huang, C. Tao, R. Lin and N. Wong, "Frequency Regularization for Improving Adversarial Robustness," 2nd International Workshop on Practical Deep Learning in the Wild at AAAI, Feb. 2023.
  70. Z. Guan, W. Zhou, Y. Ren, R. Xie, H. Yu and N. Wong, "A Hardware-Aware Neural Architecture Search Pareto Front Exploration for In-Memory Computing," in Proc. IEEE Int. Conf. Solid-State and Integrated Circuit Technology (ICSICT), Oct 2022 (Invited Paper).
  71. C. Liu, X. Qian, B. Huang, X. Qi, E.Lam, S.-C. Tan and N. Wong, "Multimodal Transformer for Automatic 3D Annotation and Object Detection," in Proc. European Conference on Computer Vision (ECCV), Oct 2022.
  72. C. Tao and N. Wong, "ODG-Q: Robust Quantization via Online Domain Generalization," in Proc. Intl. Conf. on Pattern Recognition (ICPR), Aug 2022.
  73. R. Lin, C. Chen and N. Wong, "Coarse to Fine: Image Restoration Boosted by Multi-Scale Low-Rank Tensor Completion," in Proc. Intl. Conf. on Pattern Recognition (ICPR), Aug 2022.
  74. C. Liu, X. Qian, X. Qi, E. Y. Lam, S. C. Tan and N. Wong, "MAP-Gen: An Automated 3D-Box Annotation Flow with Multimodal Attention Point Generator," in Proc. Intl. Conf. on Pattern Recognition (ICPR), Aug 2022.
  75. C. Tao, L. Hou, W. Zhang, L. Shang, X. Jiang, Q. Liu, P. Luo, and N. Wong, "Compression of Generative Pre-trained Language Models via Quantization," in Proc. Association for Computational Linguistics (ACL), May 2022, (Outstanding Paper).
  76. R. Lin, J. Ran, D. Wang, K. H. Chiu and N. Wong, "EZCrop: Energy-Zoned Channels for Robust Output Pruning," in Proc. Winter Conf. App. of Computer Vision (WACV), Jan 2022.
  77. Y. Chen, R. Lin, P. Zhen, T. Hou, C. W. Ng, H.-B. Chen, H. Yu, and N. Wong, "FASSST: Fast attention based single-stage segmentation net for real-time instance segmentation," in Proc. Winter Conf. App. of Computer Vision (WACV), Jan 2022.
  78. R. Lin, J. Ran, K. H. Chiu, G. Chesi and N. Wong, "Deformable Butterfly: A Highly Structured and Sparse Linear Transform," in Proc. Conf. on Neural Information Processing Systems (NeurIPS), Dec 2021.
  79. L. Xu, C. Lei, N. Wong and Y.C. Wu, "Overfitting Avoidance in Tensor Train Factorization and Completion: Prior Analysis and Inference", in Proc. Intl. Conf. Data Mining (ICDM), Dec 2021.
  80. C. Chen, C. Tao and N. Wong, "LiteGT: Efficient and Lightweight Graph Transformers," in Proc. Conf. Information and Knowledge Management (CIKM '21), Nov 2021.
  81. Y. Ren, R. Lin, J. Ran, C. Liu, C. Tao, Z. Wang, C. Li and N. Wong, “BATMANN: A Binarized-All-Through Memory-Augmented Neural Network for Efficient In-Memory Computing,” ASICON 2021, Oct 2021, (Invited Talk).
  82. C. C. Tsang, Steve Chim, Andy Wu, Gordon Ip, Albert Lee, K. H. Lam, N. Wong and David Ng,"An Efficient & Programmable FPGA-Based Approach for Fast-Tuning Silicon CPU Design for Embedded Systems," Proc. IEEE Intl. Conf. Signal Processing, Communications and Computing, Aug 2021.
  83. L. Xu, L. Cheng, N. Wong, Y. C. Wu, "Probabilistic Tensor Train Decomposition with Automatic Rank Determination from Noisy Data," IEEE Statistical Signal Processing Workshop (SSP), Jul 2021.
  84. Y. Cheng, Y. Yang, H.-B. Chen, N. Wong, H. Yu, "S3-Net: A Fast and Lightweight Video Scene Understanding Network by Single-shot Segmentation," Winter Conference on Applications of Computer Vision (WACV), May 2021.
  85. Z. Guan, S. Li, Y. Cheng, C. Man, W. Mao, N. Wong, H. Yu, "A Video-based Fall Detection Network by Spatio-temporal Joint-point Model on Edge Devices," Design Automation and Test in Europe (DATE), Feb 2021.
  86. J. Ran, R. Lin, H. K. H. So, G. Chesi, N. Wong, "Exploiting Elasticity in Tensor Ranks for Compressing Neural Networks," Intl. Conf. on Pattern Recognition (ICPR), Jan 2021.
  87. R.Lin, C.-Y Ko, Z. He, C. Chen, Y. Cheng, H. Yu, G. Chesi, N. Wong, "HOTCAKE: Higher Order Tucker Articulated Kernels for Deeper CNN Compression," 2020 IEEE 15th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Nov 2020 (Invited Paper).
  88. Z. He, Y. Ma, L. Zhang, P. Liao, N. Wong, Bei Yu, Martin D. F. Wong. “Learn to Floorplan through Acquisition of Effective Local Search Heuristics,” IEEE Intl. Conf. Computer Design (ICCD), Oct 2020.
  89. Y. Cheng, G. Huang, P. Zhen, B. Liu, H.-B. Chen, N. Wong, H. Yu, "An Anomaly Comprehension Neural Network for Surveillance Videos on Terminal Devices," Design, Automation and Test in Europe Conference (DATE), Mar. 2020, pp. 1396--1401.
  90. Z. Lyu, C.-Y. Ko, Z. Kong, N. Wong, D. Lin, L. Daniel, "Fastened CROWN: Tightened Neural Network Robustness Certificates," AAAI Conference on Artificial Intelligence (AAAI), Feb. 2020.
  91. K. Batselier, C.-Y. Ko, N. Wong, "Extended Kalman Filtering with Low-Rank Tensor Networks for MIMO Volterra System Identification," in Proc. of the 58th IEEE Conference on Decision and Control, Nice, France, Dec. 2019.
  92. Y. Cheng, N. Wong, X. Liu, L. Ni, H.-B. Chen, H. Yu, "A Low-Power High-Throughput In-Memory CMOS-ReRAM Accelerator for Large-Scale Deep Residual Neural Networks," International Conference on ASIC (ASICON), Oct 2019. (Invited Paper)
  93. C-Y. Ko, R. Lin, S. Li and N. Wong, "MiSC: Mixed Strategies Crowdsourcing," in Proc. International Joint Conference on Artificial Intelligence (IJCAI), Aug 2019.
  94. C. Chen, K. Batselier, C-Y. Ko and N. Wong, "A support tensor train machine," arXiv:1804.06114, in Proc. International Joint Conference on Neural Networks (IJCNN), Jul 2019.
  95. C. Chen, K. Batselier, C-Y. Ko and N. Wong, "Matrix product operator restricted Boltzmann machines," arXiv:1811.04608, in Proc. International Joint Conference on Neural Networks (IJCNN), Jul 2019.
  96. C-Y. Ko, Z. Lyu, T-W. (Lily) Weng, L. Daniel, N. Wong, D. Lin, "POPQORN: Certifying robustness of recurrent neural networks," in Proc. International Conference on Machine Learning (ICML), Jun 2019.
  97. Y. Zhang, C-Y. Ko, C. Chen, K. Batselier and N. Wong, "Sparse Tensor Network System Identification for Nonlinear Circuit Macromodeling," in Proc. Intl. Conf. Solid-State and Integrated Circuit Technology (ICSICT), Oct 2018, pp. 1--4. (Invited Paper)
  98. K. Batselier, C.-Y. Ko, A.H. Phan , A. Cichocki, N. Wong, Multilinear state space system identification with matrix product operators, in Proc. of the 18th IFAC Symposium on System Identification (Sysid 2018), Stockholm, Sweden, Jul. 2018, pp. 640-645.
  99. C. Chen, K. Batselier, M. Telescu, S. Azou, N. Tanguy and N. Wong, "Tensor-network-based predistorter design for multiple-input multiple-output nonlinear systems," in Proc. IEEE Intl. Conf. on ASIC (ASICON), Oct 2017, pp. 1117--1120 . (Invited Paper)
  100. C. Chen, K. Batselier and N. Wong, "A novel tensor-based model compression method via Tucker and tensor train decompositions," in Proc. Electrical Performance of Electronic Packages and Systems (EPEPS), Oct 2017, pp. 1--3 .
  101. Q. Chen and N. Wong, "Toward virtual prototyping of power electronics: Model order reduction for tight-coupled electro-thermal simulation," in Proc. Electrical Performance of Electronic Packages and Systems (EPEPS), Oct 2017, pp. 1--3 .
  102. Z. Chen, K. Batselier, H. Liu and N. Wong,"An efficient homotopy-based Poincare-Lindstedt method for the periodic steady-state analysis of nonlinear autonomous oscillators," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), Jan 2017, pp. 283-288.
  103. K. Batselier, Z. Chen, H. Liu and N. Wong, "A tensor-based Volterra series black-box nonlinear system identification and simulation framework," in Proc. Intl. Conf. on Computer-Aided Design (ICCAD), Nov 2016, pp. 1--7.
  104. J. Deng, H. Liu, K. Batselier, Y. K. Kwok and N. Wong, "STORM: a nonlinear model order reduction method via symmetric tensor decomposition," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), Jan 2016, pp. 557--562.
  105. H. Liu, X. Xiong, K. Batselier, L. Jiang, L. Daniel and N. Wong, "STAVES: speedy tensor-aided Volterra-based electronic simulator," in Proc. Intl. Conf. on Computer-Aided Design (ICCAD), Nov 2015, pp. 583--588.
  106. K. Batselier, Q. Chen and N. Wong, "An adaptive dynamical low-rank tensor approximation scheme for fast circuit simulation," in Proc. Intl. Conf. on ASIC (ASICON), Nov 2015, pp. 1--4.
  107. H. Liu, K. Batselier and N. Wong, "A novel linear algebra method for the determination of periodic steady states of nonlinear oscillators," in Proc. Intl. Conf. on Computer-Aided Design (ICCAD), pp. 611-617, Nov 2014.
  108. J. Deng, K. Batselier, Y. Zhang and N. Wong, "An efficient two-level DC operating points finder for transistor circuits," in Proc. Design Automation Conference (DAC), pp. 1-6, Jun 2014.
  109. Y.-C. Li, S. X.-D. Tan, T. Yu, X. Huang and N. Wong, "Direct finite-element-based solver for 3D-IC thermal analysis via H-matrix representation," in Proc. International Symposium on Quality Electronic Design (ISQED), pp. 386-391, Mar 2014.
  110. Q. Chen, W. Zhao and N. Wong, "Efficient matrix exponential method based on extended Krylov subspace for transient simulation of large-scale linear circuits," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), pp. 262-266, Jan 2014.
  111. Y. Zhang, Q. Chen and N. Wong, "Fast transistor-level circuit simulation and variational analysis via the ultra-compact virtual source model," in Proc. Intl. Conf. on ASIC (ASICON), pp. 1-4, Oct 2013. (invited paper)
  112. Q. Wang and N. Wong, "Stability-preserving model order reduction for nonlinear time delay systems," in Proc. Chinese Control Conf. (CCC), pp. 1017-1022, Jul 2013.
  113. J. Ma, K. L. Man, T. O. Ting, N. Zhang, C.-U. Lei and N. Wong, "A hybrid MPPT method for photovoltaic systems via estimation and revision method," in Proc. IEEE Intl. Symp. Circuits and Systems (ISCAS), pp. 241-244, May 2013.
  114. J. Ma, K. L. Man, T. O. Ting, N. Zhang, C.-U. Lei and N. Wong, "Low-cost global MPPT scheme for photovoltaic systems under partially shaded conditions," in Proc. IEEE Intl. Symp. Circuits and Systems (ISCAS), pp. 245-248, May 2013.
  115. C.-U. Lei, N. Wong and K. L. Man, "Integration of a wireless sensor network project for introductory circuits and systems training," in Proc. IEEE Intl. Symp. Circuits and Systems (ISCAS), pp. 2569-2572, May 2013.
  116. W. Zhao, G. K. H. Pang and N. Wong, "Automatic adaptive multi-point moment matching for descriptor system model order reduction," in Proc. VLSI Design, Automation, and Test (VLSI-DAT), pp. 1-4, Apr. 2013.
  117. Y. Zhang, N. Fong and N. Wong, "Piecewise-polynomial associated transform macromodeling algorithm for fast nonlinear circuit simulation," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), pp. 515-520, Jan 2013.
  118. S. H. Weng, Q. Chen, N. Wong and C. K. Cheng, "Circuit simulation via matrix exponential method for stiffness handling and parallel processing," in Proc. Intl. Conf. Computer Aided Design (ICCAD), pp. 407-414, Nov 2012.
  119. Q. Chen, W. Schoenmaker, S. H. Weng, C. K. Cheng, G. H. Chen, L. J. Jiang and N. Wong, "A fast time-domain EM-TCAD coupled simulation framework via matrix exponential," in Proc. Intl. Conf. Computer Aided Design (ICCAD), pp. 422-428, Nov 2012. (Best Paper Candidate).
  120. Q. Wang, E. Y. Lam and N. Wong, "New impulse(noncausality) test for descriptor systems by Mobius transformation," in Proc. Chinese Control Conf. (CCC), pp. 2759-2764, Jul 2012.
  121. Y.-C. Li, Q. Chen, S. H. Weng, C. K. Cheng and N. Wong,"Globally stable, highly parallelizable fast transient circuit simulation via faber series," in Proc. New Circuits and Systems Conference (NEWCAS), pp. 177-180, Jun 2012.
  122. Y. Zhang, H. Liu, Q. Wang, N. H. W. Fong and N. Wong, "Fast nonlinear model order reduction via associated transforms of high-order Volterra transfer functions," in Proc. Design Automation Conference (DAC), pp. 289-294, Jun 2012.
  123. Y. Zhang, N. H. W. Fong, D. C. W. Ng and N. Wong, "Co-simulation of RFIC with bondwire antenna via retarded PEEC method," in Proc. Intl. Symp. Circuits and Systems (ISCAS), pp. 229-232, May 2012.
  124. Y. Wang, H. Liu, G. K. H. Pang and N. Wong, "An operational matrix-based algorithm for simulating linear and fractional differential circuits," in Proc. Design, Automation and Test in Europe (DATE), pp. 1463-1466, Mar 2012.
  125. Y. Xu, W. Yu, Q. Chen, L. Jiang and N. Wong, "Efficient variation-aware EM-semiconductor coupled solver for the TSV structures in 3D IC," in Proc. Design, Automation and Test in Europe (DATE), pp. 1409-1412, Mar 2012.
  126. T. Wang, H. Liu, Y. Wang and N. Wong, "Weakly nonlinear circuit analysis based on fast multidimensional inverse Laplace transform," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), pp. 547-552, Jan 2012.
  127. H. Liu, F. Shi, Y. Wang and N. Wong, "Frequency-domain transient analysis of multitime partial differential equation systems," in Proc. Very Large Scale Integration (VLSI-SoC), pp. 160-163, Oct 2011.
  128. Q. Chen, W. Schoenmaker, N. Banagaaya, W. Schilders and N. Wong, "EM-TCAD solving from 0-100THz: a new implementation of an electromagnetic solver," in Proc. European Solid-State Device Research Conf. (ESSDERC), pp. 351-354, Sep 2011.
  129. Y. Xu, Q. Chen, L. Jiang and N. Wong, "Process-variation-aware electromagnetic-semiconductor coupled simulation," in Proc. Intl. Symp. Circuits and Systems (ISCAS), pp. 2853-2856, May 2011.
  130. Y. Wang, P. Du, C. K. Cheng, G. K. H. Pang and N. Wong, "A realistic power grid verification based on hierarchical current/power constraints," in Proc. Intl. Symp. Physical Design (ISPD), pp. 159-166, Mar. 2011.
  131. Z. Zhang, X. Hu, C. K. Cheng and N. Wong, "A block-diagonal structured model reduction scheme for power grid networks," in Proc. Design, Automation and Test in Europe (DATE), pp. 1-6, Mar. 2011.
  132. Z. Zhang, Q. Wang, N. Wong and L. Daniel, "A moment-matching scheme for the passivity-preserving model order reduction of indefinite descriptor systems with possible polynomial parts," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), pp. 49-54, Jan 2011 (Best Paper Award Candidate).
  133. X. Wang, Q. Wang, Z. Zhang, Q. Chen and N. Wong, "Balanced truncation for time-delay systems via approximate gramians," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), pp. 55-60, Jan 2011.
  134. C.Y. Lin, Z. Zhang, N. Wong and H. K.-H. So, "Design space exploration for sparse matrix-matrix multiplication on FPGAs," in Proc. Intl. Conf. Field-Programmable Technology (FPT), pp. 369-372, Dec 2010.
  135. Y. Wang, Z. Zhang, C.-K. Koh, G. K. H. Pang and N. Wong, "PEDS: passivity enforcement for descriptor systems via Hamiltonian-Symplectic matrix pencil perturbation," in Proc. Intl. Conf. Computer Aided Design (ICCAD), pp. 800-807, Nov 2010.
  136. Y. Wang, C. U. Lei, G. K. H. Pang and N. Wong, "MFTI: matrix-format tangential interpolation for modeling multi-port systems," in Proc. Design Automation Conference (DAC), pp. 683-686, Jun 2010.
  137. C. Y. Lin, Z. Zhang, N. Wong and H. K.-H. So, "Power-delay and energy-delay tradeoffs in sparse matrix-matrix multiplication on FPGAs," in Proc. Intl. Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), Jun 2010.
  138. Y. Shen, N. Wong and Edmund Y. Lam, "Aberration-aware robust mask design with level-set-based inverse lithography," in Proc. Photomask Japan 2010, pp. 77481U, Apr 2010.
  139. C.-U. Lei, Y. Wang, Q. Chen and N. Wong, "On vector fitting methods in signal/power integrity applications," in Proc. Intl. MultiConference of Engineers and Computer Scientists, pp. 1407-1412, Mar 2010. (Best Student Paper Award)
  140. C.-U. Lei and N. Wong, "VISA: versatile impulse structure approximation for time-domain linear macromodeling," in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 37-42, Jan 2010. (Best Paper Finalist)
  141. Z. Zhang and N. Wong, "An extension of the generalized Hamiltonian method to S-parameter descriptor systems," in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 43-47, Jan 2010.
  142. C. Y. Lin, N. Wong and H. K.-H. So, "Automatic system architecture synthesis for FPGA-based reconfigurable computers," in Proc. Intl. Conf. Field-Programmable Technology (FPT), pp.475-476, Dec 2009.
  143. Y. Zhang, N. H. W. Fong and N. Wong, "Design of CRLH millimeter-wave passive filters in standard CMOS process," in Proc. Intl. Conf. Electron Devices and Solid State Circuits, pp. 1-4, Nov 2009.
  144. Z. Zhang, C.-U. Lei and N. Wong, "GHM: A generalized Hamiltonian method for passivity test of impedance/admittance descriptor systems," in Proc. Intl. Conf. Computer Aided Design (ICCAD), pp. 767-773, Nov 2009.
  145. C. Y. Lin, N. Wong and H. K.-H. So, "Operation scheduling for FPGA-based reconfigurable computers," in Proc. Intl. conf. Field Programmable Logic and Applications (FPL), pp. 481-484, Aug 2009.
  146. M. Shen, X. Xu, N. Wong, T. I. Yuk, K. K. Y. Wong, "The impact of dispersion fluctuation on the optimization of parametric wavelength exchange," Optoelectronics and Communications Conference, pp. 1-2, Jul 2009.
  147. Zhu L., C. W. Ng, N. Wong, K. K. Y. Wong, P. T. Lai and H. W. Choi, "Fiber-coupled emissive micro-LED arrays," Society for Information Display - Display Week, Jun 2009.
  148. C. Y. Lin, N. Wong and H. K.-H. So, "An integer linear programming model for automated matrix operation scheduling on FPGAs," in Proc. 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machine, Apr 2009.
  149. N. Wong, "An Efficient Passivity Test for Descriptor Systems Via Canonical Projector Techniques", in Proc. Design Automation Conference (DAC), pp. 957-962, Jul 2009.
  150. C. U. Lei and N. Wong, "Digital IIR filter design for communication systems by discrete-time vector fitting," in Proc. Intl. Conf. Digital Signal Processing, pp., Jul 2009.
  151. Q. Chen and N. Wong, "New simulation methodology of 3D surface roughness loss for interconnects modeling", in Proc. Design, Automation and Test in Europe (DATE), pp. 1184-1189, Apr 2009.
  152. David C. W. Ng, N. Wong and David K. K. Kwong, "A 0.9V 2.7uW Small-Area 100us+ Analog CMOS Tunable-Delay Circuit Utilizing Miller Effect," in Proc. IEEE Intl. Conf. Electron Devices and Solid-State Circuits (EDSSC), pp. 1-4, Dec 2008.
  153. C. W. Ng, N. Wong, H. K.-H. So and T. S. Ng, "Quad-level bit-stream signal processing on FPGAs," in Proc. Intl. Conf. Field-Programmable Tech. (ICFPT) 2008, pp. 309-312, Dec 2008.
  154. Y. Liu and N. Wong, "Fast sweeping methods for checking passivity of descriptor systems", in Proc. IEEE Asia Pacific Conf. on Circuits and Systems, pp. 1794-1797, Dec 2008.
  155. Y. Shen, N. Wong and Edmund Y. Lam, "Interconnect thermal simulation with higher order spatial accuracy," in Proc. IEEE Asia Pacific Conf. on Circuits and Systems, pp. 566-569, Dec 2008.
  156. H. K. Kwan, C. M. Cheung, C. U. Lei and N. Wong, "Synthesis of optimal OTA-C filter structures with arbitrary transmission zeros via MINLP," in Proc. IEEE Asia Pacific Conf. on Circuits and Systems, pp. 944-947, Dec 2008.
  157. G. Zhao, H. K. Kwan and N. Wong, "Processor frequency assignment in three-dimensional MPSoCs under thermal constraints by polynomial programming," in Proc. IEEE Asia Pacific Conf. on Circuits and Systems, pp. 1668-1671, Dec 2008.
  158. C. W. Ng, N. Wong, H. K.-H. So and T. S. Ng, "Direct sigma-delta modulated signal processing in FPGA," in Proc. Intl. Conf. on Field Programmable Logic and Applications, pp. 475-478, Sep 2008.
  159. H. K. Kwan, S. H. Lui, C.U. Lei, Y. Liu, N. Wong, K. L. Ho, "Design of Hybrid Continuous-Time Discrete-Time Delta Modulators", in Proc. IEEE Int. Symp. Circuits Syst., pp. 1224-1227, May 2008.
  160. C. U. Lei, H. K. Kwan, Y. Liu and N. Wong, "Efficient linear macromodeling via least-squares response approximation," in Proc. IEEE Int. Symp. Circuits Syst., pp. 2993-2996, May 2008.
  161. C. U. Lei, C. M. Cheung, H. K. Kwan and N. Wong, "Efficient complex continuous-time IIR filter design via generalized vector fitting", in Proc. IAENG International Conference on Electrical Engineering, pp. 1393-1398, Mar 2008.
  162. Y. H. Ho, C. U. Lei, H. K. Kwan and N. Wong, "Global optimization of common subexpressions for multiplierless synthesis of multiple constant multiplications," in Proc. 13th Asia and South Pacific Design Automation Conference ASP-DAC, pp. 119-124, Jan 2008.
  163. Q. Chen and N. Wong, "Efficient numerical modeling of random rough surface effects for interconnect internal impedance extraction," in Proc. 13th Asia and South Pacific Design Automation Conference ASP-DAC, pp. 152-157, Jan 2008.
  164. C. U. Lei and N. Wong, "Efficient linear macromodeling via discrete-time time-domain vector fitting," in Proc. 21st Intl. Conf. on VLSI Design, pp. 469-474, Jan 2008.
  165. C. W. Ng, N. Wong and T. S. Ng, "Tri-level bit-stream signal processing circuits and applications," in Proc. Intl. Conf. Signal Processing and Communications Systems (ICSPCS 2007), paper ID 92, Dec 2007.
  166. David C. W. Ng, William Y.T. Wong, N. Wong, Karen W.H. Wan and David K.K. Kwong, "A low-power high-output-driving CMOS voltage reference with +/-5% trimming accuracy," in Proc. Intl. Conf. Microelectronics (ICM) 2007, pp. 338-341, Dec 2007.
  167. Y. Liu and N. Wong, "Passivity-preserving model order reduction of linear time-varying macromodels," in Proc. Intl. Conf. on ASIC (ASICON), pp. 1334-1339, Oct 2007. (invited paper)
  168. W. K. So, W. T. Cheung, Y. Liu, H. K. Kwan and N. Wong, "Design and optimization of highly linear CMOS low noise amplifiers via geometric programming," in Proc. Intl. Conf. on ASIC (ASICON), pp. 423-426, Oct 2007.
  169. Q. Chen and N. Wong, "An efficient stochastic integral equation method for modeling the influence of conductor surface roughness on interconnect ohmic loss," in Proc. Midwest Symp. Circuits and Systems (MWSCAS), pp. 1417-1420, Aug 2007.
  170. Y. Shen, E. Y. Lam and N. Wong, "Binary image restoration by signomial programming," in OSA Topical Meeting in Signal Recovery and Synthesis, pp. SMA3, Jun 2007.
  171. N. Wong and C. U. Lei, "FIR filter approximation by IIR filters based on discrete-time vector fitting," in Proc. Int. Symp. Circuits and Systems (ISCAS), pp. 2343-2346, May 2007.
  172. C. M. Cheung, C. U. Lei and N. Wong, "Design of 2D linear-phase IIR filters via Schur decomposition and discrete-time vector fitting," in Proc. IEEE Conf. Industrial Electronics and Applications (ICIEA), pp. 2403-2406, May 2007.
  173. David C. W. Ng, William Y. T. Wong, N. Wong, Karen W. H. Wan and David K. K. Kwong, "An efficient transfer-function-based approach for the fast tuning and design of DC-DC converters," in Proc. IEEE Conf. Industrial Electronics and Applications (ICIEA), pp. 682-686, May 2007.
  174. H. K. Kwan, Y. H. A. Ho, N. Wong and K. L. Ho, "Designing globally optimal delta-sigma modulator topologies via signomial programming," in Proc. Intl. Symp. VLSI Design, Automation and Test (VLSI-DAT), pp. 53-56, Apr 2007.
  175. N. Wong, "Fast positive-real balanced truncation of symmetric systems using cross Riccati equations," in Proc. Design, Automation and Test in Europe (DATE) 2007, pp. 1946-1501, Apr 2007.
  176. Y. H. A. Ho, C.U. Lei and N. Wong, "A common subexpression sharing approach for multiplierless synthesis of multiple constant multiplications," in Proc. IAENG International Conference on Electrical Engineering (ICEE 07),ppp. 1636-1639, Mar 2007. (Best Student Paper Award)
  177. C. M. Cheung, C.U. Lei and N. Wong, "Novel 2D linear-phase IIR filter design and application in noise removal," in Proc. IAENG International Conference on Electrical Engineering (ICEE 07),pp. 1793-1796, Mar 2007.
  178. S. H. Lui and N. Wong, "Design of nested transconductance-capacitance compensation amplifier via nonconvex polynomial optimization," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 542-545, Dec 2006.
  179. Q. Chen and N. Wong, "A stochastic integral equation method for resistance extraction of conductors with random rough surfaces," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 411-414, Dec 2006.
  180. C. K. Chu and N. Wong, "Model order reduction of frequency-dependent interconnect models via linear fractional transformation techniques," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 407-410, Dec 2006.
  181. C. K. Chu and N. Wong, "Efficient positive real balanced truncation of SISO systems via cross-Riccati equations," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 403-406, Dec 2006.
  182. W. T. Cheung and N. Wong, "Optimized RF CMOS low noise amplifier design via geometric programming," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 423-426, Dec 2006.
  183. S. Ma, N. Wong, and T. S. Ng, "Signal detection for MIMO-OFDM systems with time offsets," in Proc. Global Telecommunications Conference (GLOBECOM), pp. 1-5, Nov 2006.
  184. S. H. Lui and N. Wong, "Systematic power minimization in multibit delta-sigma analog-to-digital converters," in Proc. IEEE Region 10 Conf. (TENCON) 2006, DC0.2, TEN-557.
  185. Y. Shen, E. Y. Lam, and N. Wong, "Restoration of binary images using positive semidefinite programming," in Proc. IEEE Region 10 Conf. (TENCON) 2006, IP2.1, TEN-333.
  186. C. U. Lei and N. Wong, "Multiplierless polynomial-operator-based IIR filters for efficient VLSI implementation," in Proc. IEEE Region 10 Conf. (TENCON) 2006, CA3.2, TEN-698.
  187. Q. Chen and N. Wong, "Investigation of random rough surface effects in interconnect resistance extraction utilizing effective conductivity," in Proc. IEEE Region 10 Conf. (TENCON) 2006, CA1.3, TEN-610.
  188. W. T. Cheung and N. Wong, "Power Optimization In A Repeater-Inserted Interconnect Via Geometric Programming," in Proc. International Symposium on Low Power Electronics and Design (ISLPED) 2006, pp. 226-231.
  189. N. Wong and V. Balakrishnan, "Multi-Shift Quadratic Alternating Direction Implicit Iteration for High-Speed Positive-Real Balanced Truncation," in Proc. Design Automation Conference (DAC) 2006, pp.257-260.
  190. N. Wong and C.K. Chu, "A Fast Passivity Test for Descriptor Systems Via Structure-Preserving Transformations of Skew-Hamiltonian/Hamiltonian Matrix Pencils," in Proc. Design Automation Conference (DAC) 2006, pp.261-266.
  191. Y. Shen, E.Y. Lam, and N. Wong, "Binary Image Deconvolution with Positive Semidefinite Programming," in Proc. International MultiConference of Engineers and Computer Scientists (IMECS) 2006, pp. 537-542. (Best student paper award)
  192. S. Ma, N. Wong, and T.S. Ng, "Time Domain Equalization for OFDM Systems," in Proc. IEEE Int. Symp. Circuits and Systems 2006, pp. 3946-3949.
  193. Henry K.Y. Cheung, Kenneth K.Y. Wong, N. Wong, and Michel E. Marhic, "Gain Optimization of Raman-Mediated Fiber Optical Parametric Amplifiers," in Proc. SPIE Vol. 6103, pp. 61030S-1 to 10. (Photonics West 2006: Lasers and Applications in Science and Engineering.)
  194. N. Wong and V. Balakrishnan, "Quadratic Alternating Direction Implicit Iteration for the Fast Solution of Algebraic Riccati Equations," in Proc. Int. Symposium on Intelligent Signal Processing and Communication Systems, 2005, pp.373-376.
  195. Kenneth K.Y. Wong and N. Wong, "Robust Gain bandwidth optimization in two-pump fiber optical parametric amplifiers with dispersion fluctuations," in Proc. Int. Symposium on Intelligent Signal Processing and Communication Systems, 2005, pp. 297-300.
  196. N. Wong and V. Balakrishnan, "Fast Balanced Stochastic Truncation Via A Quadratic Extension of the Alternating Direction Implicit Iteration," in Proc. Int. Conf. Computer Aided Design 05, 2005, pp. 801-805.
  197. N. Wong, V. Balakrishnan, and C.-K. Koh, "Passivity-preserving model reduction via a computationally efficient project-and-balance scheme," in Proc. Design Automation Conference, 2004, pp. 369-374.
  198. N. Wong, V. Balakrishnan, C.-K. Koh, and T. S. Ng, "A fast Newton/Smith algorithm for solving algebraic Riccati equations and its application in model order reduction," in Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, vol. 5, 2004, pp. 53-56.
  199. N. Wong, T. S. Ng, and V. Balakrishnan, "A geometrical approach to robust minimum variance beamforming," in Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, vol. 5, 2003, pp. 329-332.
  200. N. Wong and T. S. Ng, "Limit cycles in embedded high-order, lowpass sigma-delta modulators with distinct NTF zeros," in Proc. IEEE International Conference on Digital Signal Processing, vol. 2, 2002, pp. 1043-1047.
  201. N. Wong and T. S. Ng, "State-trajectory behavior in high-order, lowpass sigma-delta modulators with distinct NTF zeros," in Proc. IEEE International Conference on Digital Signal Processing, vol. 2, pp. 1053-1056, 2002.
  202. N. Wong and T. S. Ng, "An efficient algorithm for downconverting multiple bandpass signals using bandpass sampling," in Proc. IEEE International Conference on Communications, vol. 3, 2001, pp. 910-914.
  203. N. Wong and T. S. Ng, "Improved roundoff noise performance in a direct-form IIR filter using a modified delta operator," in Proc. IEEE Int. Symp. Circuits Syst., vol. 2, 2001, pp. 773-776.