@inproceedings{Liu:2015:FPT,
	Author = {C. Liu and H. C. Ng and H. K. H. So},
	Booktitle = {2015 International Conference on Field Programmable Technology (FPT)},
	Date-Added = {2017-01-12 16:18:48 +0000},
	Date-Modified = {2017-01-12 16:20:15 +0000},
	Doi = {10.1109/FPT.2015.7393130},
	Keywords = {field programmable gate arrays;scheduling;ARM processor;FPGA loop accelerator design framework;QuickDough;SCGRA overlay;compile-debug-edit cycle;compute accelerator;operation scheduling;prebuilt overlay bitstream;soft coarse-grained reconfigurable array;software development flow;Arrays;Data transfer;Field programmable gate arrays;Hardware;Kernel;Libraries},
	Month = {Dec},
	Pages = {56-63},
	Title = {{QuickDough}: A rapid {FPGA} loop accelerator design framework using soft {CGRA} overlay},
	Year = {2015},
	Bdsk-Url-1 = {http://dx.doi.org/10.1109/FPT.2015.7393130}}